Seagate is Hiring !!! 

*Location*:  

 Pune, IN

*Job ID*:  7941

*About our group*:

The group is part of the Seagate’s VLSI Organization located in Fremont CA and the SI/PI(Signal and Power Integrity) engineers are located worldwide including Pune.  Seagate designs world class controller SoCs for their HDDs and our group leads the co-design for the VLSI packages from prototype to production.  Our VLSI packages must meet electrical, thermal, mechanical, cost and assembly requirements.

*About the role – you will*:

•  Study Ansys HFSS/SIwave/AEDT manuals and learn how to extract IC Package and PCBA models
  •    Automate extraction and plotting of package and PCBA models
  •    Document and Automate Seagate SI/PI flows for DDR, Serdes, PDN and any new IP
  •    Automate substrate design and design checking using Cadence SKILL/TCL/Python
  •    Work with substrate suppliers and learn substrate design rules
  •    Work with assembly subcon and learn assembly design rules
  •    Learn Seagate substrate design flow and manufacturing documentation flow
  •    Support VLSI Thermal Package model extraction and substrate warpage simulations as needed
  •    Work with Operation, PCB, IC Designer and SI/PI engineers
  •    Present your work to the Package, PCB, IC Designer and SI/PI engineers

*About you*:

•  Graduate in Electronics/E&TC engineering
• Good understanding of SI/PI and PCB or IC Package design
•  Self-motivated & a strong team player
•  Strong debug and analytical skills
•  Ability to work with minimum supervision
• Ability to quickly learn new tools and technologies

*Your experience includes*:

•  Python/C programming
  •    Knowledge of SI/PI (Transmission Line, Impedance, Xtalk, S-parameter, PDN, EMI)
  •    Knowledge of storage protocols (DDR, SATA, SAS, PCIe) will be a big plus
  •    Familiar with PCB or IC Package design process

*Location*

Pune
➡️*Apply Now* – https://seagatecareers.com/job/Pune-Engineer-I/992954900/

➡️*Apply Now* https://forms.gle/dbtMw8eXysTmTPDJ8

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